Few component technologies have evolved as rapidly in the last few years as FPGAs (field programmable gate arrays). In this highly competitive market, each new generation of devices delivers faster ...

Optunis has announced the FIR HDL Writer 0.9.0 Beta. FIR HDL Writer is an EDA tool that generates synthesizable Verilog RTL code to make FIR filters. This RTL may be synthesized to FPGAs and ASICs.

The AD9670 octal receiver is touted by Analog Devices as the first ultrasound receiver able to condition eight channels of data from RF to a baseband frequency. An integrated digital I/Q demodulator, ...