Rambus targets AI memory bottlenecks with new HBM4E controller IP

The new HBM4E Controller builds on Rambus’s track record of more than 100 HBM design wins and the company’s long-standing ...
New Electronics

Rambus launches HBM4E controller IP for next‑generation AI memory performance

Rambus has introduced a new HBM4E Memory Controller IP, marking what the company describes as a major step forward in meeting the growing memory bandwidth demands of advanced artificial intelligence ...
Semiconductor Engineering

DRAM Simulator For Evaluation of Memory System Design Changes (ETH Zurich)

A technical paper titled “Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator” was published by researchers at ETH Zurich. “We present Ramulator 2.0, a highly modular and extensible DRAM ...
Electronic Design

A Summary Of The DDR Memory Controller Standard—Wait, There Isn’t One!

The number of systems-on-a-chip (SoCs) that require an interface to off-chip memory is increasing. As a result, more and more designers are turning to double-data-rate (DDR) SDRAM interfaces such as ...
EDN

PCI Express DMA Reference Design Using External Memory

The PCI Express DMA reference design using external memory highlights the performance of the Intel Arria V, Arria 10, Cyclone V and Stratix V Hard IP for PCI Express using the Avalon Memory-Mapped ...
Electronic Design

DDR FCRAM Boosts Performance In DDR SDRAM Designs

A modified form of synchronous DRAM technology, double-data-rate, fast-cycle random access memory (DDR FCRAM) is primarily focused at the networking market segment. Yet due to its high performance, it ...
EDN

Industrial memory cards need secure controllers

First introduced in 1999 by the SD Association (SDA), the Secure Digital (SD) memory card quickly gained acceptance as a data storage medium for handheld and portable consumer devices. The SD card was ...